LBPHacker
LBPHacker
49 / 2
14th Oct 2016
8th Jul 2018
2048 cell single chamber FRAM. In this demo random values are written to random addresses. Scales pretty well as the more important addressing mechanisms are designed to use constant space rather than logarithmic. *** Added link to the R216K2A.
60hz conv electronic fram electronics subframe filt

Comments

  • Schmolendevice
    Schmolendevice
    15th Oct 2016
    @megagate75 Or he cares more about my i7 4790 without the k although my GTX960 may probably not do much for improving TPT's performance.
  • megagate75
    megagate75
    15th Oct 2016
    @QuanTech I may be wrong, but I think you can set the Max FPS by using the command tpt.setfpscap
  • QuanTech
    QuanTech
    15th Oct 2016
    @Schmolendevice HOW do you get 400 fps?
  • FuriousWeasel
    FuriousWeasel
    15th Oct 2016
    Ermahgerd! I've been really busy lately. But I'll find time to look at this!
  • mark2222
    mark2222
    15th Oct 2016
    @Schmolendevice For the record, this isn't my vertical addresser. This one is a lot smaller and more scalable (see his save description).
  • Schmolendevice
    Schmolendevice
    14th Oct 2016
    @LBPHacker Well, this simulation does run at a glorious 300 fps on full screen and up to 400 on small screen. I cannot really tell much about the difference between the overhead contribution of PSTN movement and particle scans unless I fill a screen and compare the fps while static to the fps with all particles moving back and forth each frame.
  • LBPHacker
    LBPHacker
    14th Oct 2016
    I'm really fond of my laggy pistons, don't ruin my fun :P Also, nah, that' my own vertical addresser design. mark2222 seemed impresed by it on IRC.
  • Schmolendevice
    Schmolendevice
    14th Oct 2016
    Also, I think someone has done this before, but it's possible to make a 60hz ctype randomizer using CLNE(SPRK). @k1773nguy Assuming a 32 by 512 cell single frame FRAM where 64 by 512 would cause too much lag, the limit may be around 49 kB when storing 3 bytes per cell. At least this doesn't exceed the addressing capability of a 16-bit addressing space.
  • Schmolendevice
    Schmolendevice
    14th Oct 2016
    @LBPHacker And yay, it's out! Flashiness and lots of pretty PSTN jiggliness. :D But indeed, we still have that theoretical processing overhead of pushing 2048 pixels back and forth every frame... Definitely revolutionary and I believe you've incorporated mark2222's vertical addresser? But again, setting up to 2048 particle's x positions each frame. It's like a theoretical DTEC with tmp2 = 22 or 32...
  • k1773nguy
    k1773nguy
    14th Oct 2016
    now we jsut need more memory (7mB) so we can store powder toy in powder toy