Comments

Jerehmia 20th May 2023

If you really want that overflow/carry status you'll have to structure the adder a little differently. You'll have to shift the carry flag input of the half adder instead of the output, this way you can preserve the carry in the 29th bit (if it's in the 30th you're going to run into ARAY annihilation problems). This means you'll have to shift the carry input both for the carry computations (AND) and the sum computations (XOR) in the half adder, but you'll figure it out. :)
tptQuantification 20th May 2023

I could add an error flag for when the 30th bit is missing from a or b or result.
tptQuantification 3rd May 2023

@Jerehmia I could probably use the space used in the opcode for output a and output b for other things. I gotta figure out a control unit, but I'm fairly sure a control unit could handle that.
Jerehmia 2nd May 2023

Yeah this is pretty awesome, time to start working on a bus I guess :) +1 There is a bit of latency you could get rid of in a next version but this has everything you need. (A full compare is just a subtract where you ignore the result except for the flags, but I wouldn't break the 4-bit instruction code for that, subtract suffices.)

The Powder Toy