Hi
I have made an ALU logic gate from a circuit diagram and have been having trouble. I have gone through it and I have even made circuit simulations on other programs to confirm that what i did in TPT was wrong. It seems that when I put in inputs to f0 and f1, i get an output in the correct and incorrect area. (at the top there is an OR gate with 4 inputs, and it is the third input that shouldn't be... inputting.)



If anyone has any comments or advice, please comment.

edit:This should be in help, but I accidentally put it in creations, sorry.

That wasn't the error. here I outline the error:


I tried moderating the input with aray, but that didn't work.
I don't think there is meant to be an output.

(please don't vote, as it does not work.)

@dnerd
The not gates function as they should, the main problem I have is that they don't seem to respond fast enough.

@jalfor
having a constant f2(i referred to it as F0) alters the outputs of other inputs.

It seems to alter most outputs that involve F0

@stevenliao98 (View Post)
It doesn't really work though. :(